SI5110-EVB【PDF 1/48 页】BOARD EVALUATION FOR SI5110

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S i 5 1 0 0 / Si 5 11 0 - EVB

E v a l u a t i o n B o a r d S e t f o r S i 5 1 0 0 a n d S i 5 11 0

OC-48/STM-16 SONET/SDH T RANSCEIVERS

Description

Features

The Si5100-EVB and Si5110-EVB

motherboard/

Separate supply connections for VDD (1.8 V) and

daughter card sets provide a platform for testing and

characterizing Silicon Laboratories’ Si5100/Si5110

VDDIO (1.8 V or 3.3 V) allow LVTTL I/Os to be

powered at either 1.8 V or 3.3 V.

SiPHY TM OC-48/STM-16 SONET/SDH Transceiver.

The Si5100 and Si5110 transceiver devices provide full-

duplex operation at serial data rates up to 2.7 Gbps.

The transceiver device is mounted on the EVB daughter

card. The high-speed serial signals are accessed via

SMA connectors on the daughter card itself. The low-

speed parallel data channels are routed from the

daughter card to the motherboard through the industry-

standard 300-pin meg-array connector.

The included transceiver loopback motherboard

provides a hardware connection between the

transceiver low-speed parallel data outputs, RXDOUT,

and the transceiver low-speed parallel data inputs,

TXDIN. Test points are provided on the motherboard to

allow monitoring of the parallel data channels. The clock

signals associated with the low-speed data channels

are routed to SMA connectors on the loopback

motherboard. Static control and status signals are

routed to standard 100-mil center posts.

An optional full-duplex motherboard is also available for

the transceiver daughter card. The full-duplex

motherboard also utilizes the industry-standard 300-pin

meg-array connector to allow attachment of the

daughter card. The full-duplex motherboard routes all of

the transceiver low-speed parallel data outputs and

inputs to standard SMA connectors. The optional full-

duplex motherboard is useful when connecting the

transceiver device to a parallel bit error rate tester

(ParBERT), or in other applications that require full

access to the low-speed parallel data channels.

Control inputs are jumper configurable.

Status outputs brought out to headers for easy

access.

Potentiometers provided for controlling analog

inputs.

Loopback Motherboard (included) provides

hardware path between low-speed parallel data

outputs RXDOUT and low-speed parallel data inputs

TXDIN.

Optional full-duplex motherboard provides access to

all low-speed parallel data outputs and inputs via

SMA connectors.

Preliminary Rev. 0.5 6/03

Si5100/Si5110-EVB-05

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